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PDF) Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse
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Nonâ•'volatile memories: Materials, nanostructures and integration approaches
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Proceedings of the 29th Annual ACM Symposium on Applied Computing: A test framework for large scale declarative queries: prelimi
RAM Workshop
Multi-Level Control of Resistive RAM (RRAM) Using a Write Termination to Achieve 4 Bits/Cell in High Resistance State
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The Brain | CNRS News
Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks
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